DPSD-LESSON PLAN

DS-2marks

DS-2marks

DS-Imp 2Marks with answers(Previous sem)

http://www.mediafire.com/?nb62q4c6k4dsb47

DS-Question Papers(Model)

Maths-Important topics

Itha padicha confirm ah pass pannidalamnu Maths mam sonangalam.
Note:Not for the toppers

MATHS.. Fourier series imp 2M and 16M ...

OOPS study material.. IMP 2M and 16M question... 2M with answers..

http://www.mediafire.com/?ec67m4t438g9tbu

Vote for the real hero to become the "CNN hero of the year" : http://edition.cnn.com/SPECIALS/cnn.heroes/archive10/naryanan.krishnan.html

Verilog questions

2to4 decoder
1to4 demux
4to1 mux
full adder
half adder
half subtractor
4 bit up/doen counter
siso
full subtractor
sipo
odd parity
even parity
xs3 to bcd
bcd to xs3
binary to gray
gray to binary
4input universal logic gates
octal to binary
8to 1 mux

// Design Name : full_subtracter_gates
3 // File Name : full_subtracter_gates.v
4 // Function : Full Subtracter Using Gates
5 // Coder : Deepak Kumar Tala
6 //-----------------------------------------------------
7 module full_subtracter_gates(x,y,z,difference,borrow);
8 input x,y,z;
9 output difference,borrow;
10
11 wire inv_x,borrow1,borrow2,borrow3;
12
13 not (inv_x,x);
14 and U_borrow1 (borrow1,inv_x,y),
15 U_borrow2 (borrow2,inv_x,z),
16 U_borrow3 (borrow3,y,z);
17
18 xor U_diff (difference,borrow1,borrow2,borrows);
19
20 endmodule