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Sunday, October 10, 2010
DPSD-Important questions
Part-A
1.VHDL and 6 keyword used.
2.JK flip-flop circuit & table equation
3.D flip-flop from SR flip-flop
4.verilog code for Boolean expression e=a+bc+b’d and
f=bc’+bcd+ab’c’
5.logic diagram for description module circuit(op y1,ip a,b,op y2); assign y1=a&b; or(y2,a,b) end module
Part-B
1.write the HDL code for 4*1 MUX.
2.draw the circuit and write the HDL code for 4-bit parallel adder.
More questions coming soon
1.VHDL and 6 keyword used.
2.JK flip-flop circuit & table equation
3.D flip-flop from SR flip-flop
4.verilog code for Boolean expression e=a+bc+b’d and
f=bc’+bcd+ab’c’
5.logic diagram for description module circuit(op y1,ip a,b,op y2); assign y1=a&b; or(y2,a,b) end module
Part-B
1.write the HDL code for 4*1 MUX.
2.draw the circuit and write the HDL code for 4-bit parallel adder.
More questions coming soon
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