Wednesday, October 20, 2010

2-4 Decoder
1 module decoder_2to4_gates (x,y,f0,f1,f2,f3);
2 input x,y;
3 output f0,f1,f2,f3;
4
5 wire n1,n2;
6
7 not i1 (n1,x);
8 not i2 (n2,y);
9 and a1 (f0,n1,n2);
10 and a2 (f1,n1,y);
11 and a3 (f2,x,n2);
12 and a4 (f3,x,y);
13
14 endmodule

4:2 Decoder
1 module encoder_4to2_gates (i0,i1,i2,i3,y);
2 input i0,i1,i2,i3;
3 output [1:0] y;
4
5 or o1 (y[0],i1,i3);
6 or o2 (y[1],i2,i3);
7
8 endmodule

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